As product life cycles shorten, rapid yield improvement becomes critical. In the area of semiconductor devices, for example, a major part of the yield improvement effort has traditionally involved failure analysis on devices that fail electrical test. Once fault sources for device failures are determined, the information is fed back to the fabrication facility for corrective action.
In order to determine such fault sources, however, a large amount of data often must be processed. When such data is analyzed manually, the task can be especially daunting. U.S. Pat. No. 5,475,695, entitled “Automatic Failure Analysis System,” invented by John M. Caywood et al., and incorporated herein by this reference, describes an automatic failure analysis system for processing test data to identify failure causing defects.
Even in an automatic failure analysis system, however, it is useful to improve the computational efficiency for determining fault sources for device failures, because such improvement translates directly into accelerating the yield analysis and consequently, yield improvement curve. As a result, devices can be produced with higher yields sooner, thereby improving manufacturing throughput and reducing unit cost earlier in the product life cycle of the device.